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| MM74C42 BCD-to-Decimal Decoder October 1987 Revised January 1999 MM74C42 BCD-to-Decimal Decoder General Description The MM74C42 one-of-ten decoder is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors. This decoder produces a logical "0" at the output corresponding to a four bit binary input from zero to nine, and a logical "1" at the other outputs. For binary inputs from ten to fifteen all outputs are logical "1". s Low power: 50 nW (typ.) s Medium speed operation: 10 MHz (typ.) with 10V VCC Applications * Automotive * Data terminals * Instrumentation * Medical electronics * Alarm systems Features s Supply voltage range: 3V to 15V s Tenth power TTL compatible: drive 2 LPTTL loads s High noise immunity: 0.45 VCC (typ.) * Industrial electronics * Remote metering * Computers Ordering Code: Order Number MM74C42N Package Number N16E Package Description 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Connection Diagram Pin Assignments for DIP Top View (c) 1999 Fairchild Semiconductor Corporation DS005882.prf www.fairchildsemi.com MM74C42 Schematic Diagram Truth Table Inputs D 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 C 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 B 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 A 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 1 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 3 1 1 1 0 1 1 1 1 1 1 1 1 1 1 1 1 Outputs 4 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 1 5 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 6 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 7 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 8 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 9 1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 www.fairchildsemi.com 2 MM74C42 Absolute Maximum Ratings(Note 1) Voltage at Any Pin (Note 1) Operating Temperature Range Storage Temperature Range Power Dissipation (PD) Dual-In-Line Small Outline Operating VCC Range 700 mW 500 mW 3.0V to 15V -0.3V to VCC + 0.3V -40C to +85C -65C to +150C Absolute Maximum VCC Lead Temperature (Soldering, 10 seconds) 18V 260C Note 1: "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. Except for "Operating Temperature Range" they are not meant to imply that the devices should be operated at these limits. The Electrical Characteristics tables provide conditions for actual device operation. DC Electrical Characteristics Min/Max limits apply across temperature range unless otherwise noted Symbol CMOS TO CMOS VIN(1) VIN(0) VOUT(1) VOUT(0) IIN(1) IIN(0) ICC VIN(1) VIN(0) VOUT(1) VOUT(0) Logical "1" Input Voltage Logical "0" Input Voltage Logical "1" Output Voltage Logical "0" Output Voltage Logical "1" Input Current Logical "0" Input Current Supply Current Logical "1" Input Voltage Logical "0" Input Voltage Logical "1" Output Voltage Logical "0" Output Voltage VCC = 5.0V VCC = 10V VCC = 5.0V VCC = 10V VCC = 5.0V, IO = -10 A VCC = 10V, IO = -10 A VCC = 5.0V, IO = 10 A VCC = 10V, IO = 10 A VCC = 15V, VIN = 15V VCC = 15V, VIN = 0V VCC = 15V VCC = 4.75V VCC = 4.75V VCC = 4.75V, IO = -360 A VCC = 4.75V, IO = 360 A 2.4 0.4 VCC - 1.5 0.8 -1.0 0.05 300 4.5 9.0 0.5 1.0 1.0 3.5 8.0 1.5 2.0 V V V V V V V V A A A V V V V Parameter Conditions Min Typ Max Units CMOS/LPTTL INTERFACE OUTPUT DRIVE (see Family Characteristics Data Sheet) TA = 25C (short circuit current) ISOURCE ISOURCE ISINK ISINK Output Source Current Output Source Current Output Sink Current Output Sink Current VCC = 5.0V, VIN(0) = 0V, VOUT = 0V VCC = 10V, VIN(0) = 0V, V OUT = 0V VCC = 5.0V, VIN(1) = 5.0V, VOUT = VCC VCC = 10V, VIN(1) = 10V, V OUT = VCC -1.75 -8.0 1.75 8.0 mA mA mA mA AC Electrical Characteristics TA = 25C, CL = 50 pF, unless otherwise specified Symbol tpd CIN CPD Parameter Propagation Delay Time to Logical "0" or "1" Input Capacitance Power Dissipation Capacitance (Note 2) Conditions Min Typ 200 90 5 50 Max 300 140 Units ns ns pF pF VCC = 5.0V VCC = 10V (Note 3) (Note 4) Note 2: AC Parameters are guaranteed by DC correlated testing. Note 3: Capacitance is guaranteed by periodic testing. Note 4: CPD determines the no load AC power consumption of any CMOS device. For complete explanation see Family Characteristics Application Note-- AN-90. 3 www.fairchildsemi.com MM74C42 BCD-to-Decimal Decoder Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N16E LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. |
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